a small question about emu10k's delay line~

Discussion in 'Effects and the DSP' started by JoshuaChang, May 7, 2011.

  1. JoshuaChang

    JoshuaChang New Member

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    does the code below means 2 x 1sample delay?

    Code:
        idelay write w1 at 0x0;
        idelay read r1 at 0x1;
        idelay write w2 at 0x2;
        idelay read r2 at 0x3;
     
  2. stylus02

    stylus02 New Member

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    yes, this could be a stereo delay, because you write 2 audiostreams independently into the delay ram. both are delayed for 1 sample. "w1" means the write- and "r1" the read- adress of audiostream nr. 1. the delay ram circulates through it's predifined range and picks up a sample when it meets the read adress. this process corresponds to the command- page processing speed of the dsp 48000 times each second.
     
    Last edited: May 7, 2011
  3. Russ

    Russ Well-Known Member

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    Yes (assuming that those addresses are not changed later by DSP instructions used by the plugin).
     
  4. JoshuaChang

    JoshuaChang New Member

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    but it use 4sample tram size?
    each delay line will use (actual delay size+1) tram size?
     
  5. Max M.

    Max M. h/h member-shmember

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    Îòâåò: a small question about emu10k's delay line~

    Well, yep. Technically it could be:
    Code:
    idelay write w1 at 0;
    idelay read  r1 at 1;
    idelay write w2 at 1;
    idelay read  r2 at 2;
    itramsize          2;
    
    But this would be a harder to understand code (like it would require always reading from r1 *before* writing to w2 - while it's not), so it's just easier/more readable/safer to keep some gaps between lines.

    In fact, internally - it's even more complicated due to xtram latency and dependencies on a position of the corresponding code in the code memory. There're some hidden flags and complicated conditions to set them which may to work not always correct due to lack of documentation - so it's just... yes, "safer" to use some gaps just to keep yourself away from unexpected mysterious bugs/issues.
     
    Last edited: May 7, 2011
  6. stylus02

    stylus02 New Member

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    what max showed is a "trick" to save delay memory. you have to read out the value at r1 and copy it to a new register e.g. macs new, r1, 0, 0. then you reuse the r1 adress for a new write process w2. this saves 1 memory place (of thousands), but its not really usefull and unsave. i hope it works that way max. :)
     
  7. JoshuaChang

    JoshuaChang New Member

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    Re: Îòâåò: a small question about emu10k's delay line~

    thanks for the technical reply, now i understand the delayline workflow!
     
  8. Max M.

    Max M. h/h member-shmember

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    Îòâåò: a small question about emu10k's delay line~

    hehe, typically it works (or at least it worked at times we tested it - when E. had implemented those hidden tram alignment flags in kX) - but you never know if it will work under every possible condition :)
    So I actually (well, depending on my mood :) prefer to have even 2 sample gaps in between lines (including the end of plugin lines). Well, I guess you don't really need to bother with those things in context of C simulation (there're different problems anyway) - but in case of an abstract "fx8010" machine - yes, the {0,1,1,2}->2 thing should be valid code.
     
    Last edited: May 7, 2011
  9. stylus02

    stylus02 New Member

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    now, let me ask: does anyone work on a fx8010 simulator (function set) in c/c++? ;)
     

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